On August 10, 2026, The Information reported that Microsoft plans to unveil its next-generation in-house AI chip, Maia 300, this fall — potentially as early as September. The company is in negotiations with TSMC to secure manufacturing capacity for more than 300,000 Maia 300 units, with delivery targeted for 2027. The longer-term ambition extends to over one million units. By comparison, the preceding Maia 200 saw production of only approximately 116,000 units; this first batch of 300,000 represents roughly 2.6 times that volume, and the one-million-unit target would be approximately 8.6 times the current level. Andrew Wall, General Manager of Azure Maia, stated that "Microsoft continues to invest in custom silicon as part of our long-term AI infrastructure strategy," while noting that component supply and TSMC's tight advanced packaging capacity could constrain the actual pace of scaling.
The move marks a decisive shift in the hyperscale cloud sector from small-batch validation to volume-level silicon substitution. Google has already begun recognizing revenue from direct Tensor Processing Unit sales, while Amazon's Trainium chips have secured commitments from Anthropic for roughly one million units — leaving Microsoft with a narrowing window to close both the cost gap and its negotiating position with external chip suppliers. Microsoft is spending approximately $35.8 billion per quarter on AI infrastructure, and the core logic of its in-house chip program is to run both its own models and OpenAI workloads on Maia silicon, reducing dependence on Nvidia GPUs and lowering inference costs. IDC notes that this reflects a broader trend of hyperscalers pursuing vertical integration across the AI infrastructure stack to address the converging pressures of rising costs, power constraints, and supply limitations.
For the domestic electronic components supply chain, the per-unit adoption of high-voltage MOSFETs, PMICs, MLCCs, and molded inductors in AI server designs is rising sharply, with some AI power component lead times already extending to 40 weeks. TSMC's CoWoS advanced packaging capacity is projected to remain in tight balance through the end of 2027, while Japan's third-round semiconductor export controls — specifically targeting high-end packaging equipment — reinforce the signal of constrained supply for advanced packaging materials and complementary components. In this environment, the ability of downstream solution providers and distributors to navigate alternative sourcing, long-term inventory planning, and cross-fab coordination for power semiconductors, passive components, and memory chips will be the decisive variable in delivery efficiency as the AI compute expansion unfolds.